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A clock with time period 'T' is used with 'n' stage shift register
If a clock with time period 'T' is used with 'n' stage shift register, the output of the final stage will be delayed by 1. nT seconds 2. (n-1)T seconds 3. n/T seconds 4. (2n-1)T seconds
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DVST monitor
A DVST monitor 1. cannot display colour 2. can display 4 colour 3. can display 3 colour 4. can display many colour
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Convert Binary to BCD
How can we convert a binary number into BCD number directly and vice-versa, without converting it into any other number system?
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Superhet receiver
Explain the importance and effect of IF IN radio receiver.
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What does CE mean..U will see it on almost every chip(IC)..
The Answer is Certified European
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Motorola's 68040 is comparable to
Motorola's 68040 is comparable to 1. 8085 2. 80286 3. 80386 4. 80486
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In a ripple counter using edge-triggered JK flip-flop. the pulse input is applied to the
in a ripple counter using edge-triggered JK flip-flop. the pulse input is applied to the 1. clock input of oll flip-flops 2. clock input of one flip-flop 3. J and K input of one flip-flop 4. J and K input of all flip-flops
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Signal Tristate
What is the Tri State of a Signal?
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Transistor Bias Current
What is meant by saying at what current is transistor biased?
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Mod-N counter
How can we identify how many states the ripple counter is having by looking at the figure as it can also have some invalid states?
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